Company: | APPLE |
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Job Role: | Chip level VLSI PD CAD Engineer |
Experience: | (2+years): |
Vacancy: | 5+ |
Qualification: | Bachelor degree In Computer science/Electrical Engineering or equivalent |
Salary: | Upto$85000-USD/PA |
Location: | Santa Clara Valley California USA |
Join us on Telegram | Click Here |
Apply Mode: | (Online) |
Start Date: | 5-2-22 |
- Give imaginative answers for further develop region, power, execution of chip level VLSI plans.
- - Foster calculation and GUI that interestingly addresses configuration challenges at Apple.
- - Give documentation, preparing and new client support.
- - Answerable for stream relapse, and code discharge for quite some time/destinations.
- Solid programming foundation is required. Has demonstrated record being developed of huge scope programming projects that are strong and versatile.
- Experience in applying complex CAD calculations to point actual plan issues.
- Skill in Tcl/Tk/Perl/Python prearranging is useful.
- Past working or entry level position insight in chip plan or CAD is gigantic in addition to.
- You are a self-propelled, devoted issue solver with solid social and relational abilities.
- Comprehend various parts of chip plan: floorplanning, arrangement, pin task, feed through inclusion, clock dispersion, cushion ring development, steering, timing examination.
- Working information on Cadence Innovus or Synopsys ICC is an or more.
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